The embodiments described herein relate generally to semiconductor devices, and more particularly to metal-oxide-semiconductor (MOS) devices, and even more particularly to the structure and manufacturing methods of high-voltage MOS devices. High-voltage metal-oxide-semiconductor (HVMOS) devices are widely used in many electrical devices, such as input/output (I/O) circuits, CPU power supplies, power management systems, AC/DC converters, etc. There are a variety of forms of HVMOS devices. A symmetric HVMOS device may have a symmetric structure on the source side and drain side. High voltage can be applied on both drain and source sides. An asymmetric HVMOS device may have asymmetric structures on the source side and drain side.
HVMOS structures have current and breakdown voltage ratings that are functions of the channel dimensions. Ideal HVMOS devices display high breakdown voltages with low resistance between the source and drain when in the “on” state. Power MOS devices, including HVMOS structures, are frequently created and operated in groups, with multiple Power MOS devices operating in parallel to divide current between the multiple devices. With multiple devices operating in close proximity, and at high voltages, devices may be isolated using several techniques, including shallow trench isolation (STI) and additional peripheral high voltage n-wells (HVNW) and p-wells (HVPW).